This TTL computer looks like an interesting design:

• It implements an 8-bit RISC CPU with an 8-instruction CPU using a surprisingly small number of chips: just 36 standard TTL chips, a ROM, and an SRAM chip.

• The VGA output is generated entirely in software with no additional graphics hardware (other than a resistor DAC). User code runs only during the hsync and vsync periods.

• The ROM kernel takes care of all the VGA timing and runs a virtual machine which presents itself as a 16-bit CPU and includes an interpreter so programs can be written in a high level language.